1. Technical Field
The present invention relates to a stacked-type semiconductor packaging module, more specifically to a method for manufacturing a substrate, on which a cavity is formed.
2. Description of the Related Art
With the development of the electronics industry, there has been increasing demands for electronic parts that perform better and are smaller. To accommodate these demands, the semiconductor packing technologies have been evolving from packing one integrated circuit on one substrate to packing several integrated circuits on one substrate. Moreover, to address the need for realizing high-performance, high-density packages, and to meet the demand for these packages, the “package on package (POP)” technology has been introduced. However, minimizing the thickness of the package has been a challenge to overcome for successful implementation of the POP technology.
FIG. 1 is a sectional view of a package on package in accordance with the prior art. FIG. 1 shows a lower package 110, an upper package 120, an upper solder ball 103, and a lower solder ball 140.
The conventional ball grid array (BGA) semiconductor package has a substrate body, in which a plurality of patterned conductive wires are installed. On top of the substrate body are a plurality of chip pads, to which semiconductor chips are wire-bonded. In addition, some portion of the top of the substrate body is molded with an epoxy compound and forms a molding part, such that the semiconductor chip and metal wire are enveloped. Adhered to the bottom of the substrate are a plurality of solder balls such that the other ends of the conductive wires installed in the substrate can be connected. This structure of a conventional ball grip array semiconductor package is too thick to be stacked as a highly integrated memory module within a limited portion.
The lower package 110 of the conventional package on package has a dual-level structure, and an integrated circuit is mounted on the surface of this substrate. The substrate of the lower package 110 is manufactured in the same method as manufacturing a general printed circuit board. The increasing density in the semiconductor package module necessitates the mounting of a plurality of integrated circuits. With the conventional method, it is difficult to increase the mounting in the lower package 110 while maintaining the total thickness of the package on package. The die-thinning method, which reduces the thickness of a semiconductor chip, can be one way of reducing the thickness, but this raises the issue of function-error with a prolonged operation. Therefore, improvement in mounting capacity of the package on package is attempted by reducing the thickness of the substrate.
Also, circuit wires are formed on insulation layers of the lower package 110 and the upper package 120, thickening the substrate used in the packages.